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Fred Schenkelberg


Fault Tree Analysis and Its Common Symbols

Another method for root cause analysis

Published: Tuesday, June 28, 2016 - 15:57

A fault tree analysis (FTA) is a logical, graphical diagram that starts with an unwanted, undesirable, or anomalous state of a system. The diagram then lays out the many possible faults, and combinations of faults, within the subsystems, components, assemblies, software, and parts comprising the system that may lead to the top-level unwanted fault condition.

An FTA shows the many possible cause-and-effect paths to a specific fault condition. For example, a laptop computer may have a top-level fault of not turning on. A few possible causes are a dead battery, faulty power distribution circuitry, or a broken power switch.

By graphically portraying the various paths to the top-level fault, you may be able to:
1. Identify ways to improve the system's reliability by improving critical elements of the system
2. Quickly identify the root cause of an actual fault by using the FTA to evaluate each potential cause
3. Use Boolean algebra to calculate the probability of the fault occurring overall and via each potential path
4. Provide an alternative view of system performance with a focus on one particular fault at a time
5. Uncover potential unwanted interactions, adverse secondary faults, and the effect of human interaction on system behavior

A team activity

The development of an FTA should be accomplished by a team. Although an individual could construct a fault tree, bringing a group together with deep knowledge of the various elements of a system will result in a comprehensive fault tree. The team gains insights by discussing the system's response to potential faults which may result in identifying additional experiments or modeling to fully characterize system behavior. Or, it may reveal potential improvements to the design or improved mitigation of potential faults.

The initial construction of the fault tree should take place early in the system development process. Ideally, the initial work begins just as the basic system architecture and essential functions are defined.

As the system development defines subsystems and specific components, the team should refine the FTA and use the tool as a guide to avoid increasing the probability that the top level fault will occur. If the FTA occurs too late in the development process, it will have little impact on the development and improvement of system reliability.

Elements of a fault tree

A fault tree is a top-down, graphical, and logical model depicting the various ways a specific fault might occur and is made up of specific logic symbols. The logic gates provide a means to relate the various lower-level faults as they progress to the occurrence of the top-level fault.

There are three groups of symbols that are useful when constructing a fault tree:
• Event symbols. "Events" are conditions or faults. The symbols indicate if they are normal, independent, conditional, or contributing. They are generally the lowest-level faults in the analysis.
• Gate symbols. "Gates" depict the basic functional relationship in logic form and are used to connect lower-level events that contribute to the upper-level events or faults.
• Transfer symbols: These provide a convenient means to connect related fault trees, including fault trees of a subsystem to its system.

Common event symbols

Basic event—circle: a basic initiating fault requiring no further development

Conditioning event—oval: specific conditions or restrictions that apply to any logic gate (used primarily with Priority and Inhibit gates)

Undeveloped event—diamond: an event that is not further developed, either because it's of insufficient consequence or because information is unavailable

House event—house: an event that is normally expected to occur

Common gate symbols

AND—an output fault occurs if all the input faults occur

OR—an output fault occurs if at least one of the input faults occur

Combination—an output fault occurs if n of the input faults occur

Exclusive OR —an output fault occurs if exactly one of the input faults occurs

Priority AND—an output fault occurs if all the input faults occur in a specific sequence (use conditioning event to detail specific order)

Inhibit—an output fault occurs if the (single) input fault occurs in the presence of an enabling condition (use condition event to detail enabling condition(s))

Common transfer symbols

Transfer in—indicates that the tree is developed further at the occurrence of the corresponding transfer out (e.g., on another page)

Transfer out—indicates that this portion of the tree must be attached at the corresponding transfer in

Symbols and descriptions are taken from the Fault Tree Handbook With Aerospace Applications (NASA, 2002).


About The Author

Fred Schenkelberg’s picture

Fred Schenkelberg

Fred Schenkelberg is an experienced reliability engineering and management consultant with his firm FMS Reliability. His passion is working with teams to create cost-effective reliability programs that solve problems, create durable and reliable products, increase customer satisfaction, and reduce warranty costs. Schenkelberg is developing the site Accendo Reliability, which provides you access to materials that focus on improving your ability to be an effective and influential reliability professional.